ECE Senior Design 2004

Reconfigurable Computing System

 

Team #: ECE-35

 

 

Advisor:
Dr. Prawat Nagvajara prawat_nagvajara@cbis.ece.drexel.edu

Team members:
Aashutosh Banker abb25@drexel.edu
Son Dinh shd23@drexel.edu
Tai Nguyen tdn26@drexel.edu
Harshal Shah has25@drexel.edu
Anna Lee  akl25@drexel.edu

 

 

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Abstract


Reconfigurable computing system is a concept of utilizing custom hardware specific to the algorithms in providing high-performance (speed) computing. Current Digital Signal Processing (DSP) algorithm utilizes Application-specific integrated circuit (ASIC) and software-programmed microprocessor. These technologies have their own drawbacks. Software programmed microprocessor is reconfigurable but slow due to high execution overhead for each individual operation and ASIC is fast but unalterable after fabrication. Reconfigurable computing is intended to fill the gap between hardware and software, achieving much higher performance than software, while maintaining a higher level of flexibility than ASIC and microprocessor.
The team proposes to implement techniques for dynamic reconfiguration of the architecture for different DSP algorithms. The team will produce a prototype of a reconfigurable computing DSP package comprising with algorithms such as Fast Fourier Transforms (FFT), correlation and linear solvers. The prototype will demonstrate the feasibility of Field Programmable Gate Arrays (FPGA) technology when interoperated with software running on the host computer. The equipment and software for the project will be supported by the Drexel University Application Specific Computing Research Group.